Hello,
Hope you are doing great.
Please review the requirement and if you find it matching your profile then send me your updated resume ASAP
Position Title: ASIC Physical Design Engineer
Duration: 12 Months
Any visa is okay
Locations:
- Portland, Oregon (2 positions)
- Chandler, Arizona (6 Positions),
- Boston MA (3 Positions)
Position: Senior Engineer – PD : Job Responsibility
- Responsibilities includes all aspects of physical design including synthesis, floor planning, place and route, Clock Tree Synthesis, Clock Distribution, IP integration, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM and Tape Out. Should be able to interface with Front End Design team to resolve Design Issues
- Mentoring new team member
Desired Skills & Experience:
- Must possess 8 to 15 years of hands on experience in the Hardmacro through P&R from Netlist to GDS including timing closure and Physical verification (Proficient in Synopsys ICC, Magma Talus or Cadence FE tool set.).
- Design experience in all aspects of physical design.
- Proficient in Synopsys ICC, Magma Talus or Cadence FE tool set.
- Experience with Mentor Olympus tool is a Plus
- Technologies: 28nm, 32nm and 40nm.
- Experience in Mentor caliber tools to run Physical verification
- Knowledge of I/R drop analysis is a Plus
- Experience in Tcl/Tk, PERL is a Plus
- Excellent verbal and written communication skills are required.
- Excellent interpersonal and analytical skills with the ability to work independently.
- Highly motivated, excellent team spirit, product and customer oriented.
Regards,
Ashish Gupta
1351 McCarthy Boulevard, Suit 116, Milpitas, CA, USA, 95035
Phone : 408-457-9381 ex 4046
Yahoo, Hangouts : ashish.recruiter12
Email : ashish.gupta@idctechnologies.com
URL : WWW.idctechnologies.com
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