Position: ASIC/SoC Verification Engineer, San Diego, CA

Hi Partners,

Hope you are doing well.

Please let me know if you have anyone for below mentioned position with resume and following details of your consultant.

Full Name/Phone/Email/Current Location/Availability/Rate
 
Position: ASIC/SoC Verification Engineer
Location: San Diego, CA
Duration: 6+ months  can extent further
 
Job Description:
·Skills/Experience Strong verification skills:
·4+ years of experience in digital design & verification.
·Test planning, problem solving, debug, adversarial testing.
·Strong working knowledge of System Verilog Testbench, UVM methodology
·Low Power design concepts, Low Power Verification Methodology
·Verification of high-speed parallel/serial IO interfaces such as D-PHY, M-PHY, SATA, Display Port, PCIe, USB2.0, USB3.0, HDMI experience is plus
·Mixed signal methodology experience(spice in the leaf, spice in the middle) in addition behavioural modelled mixed signal verification is added advantage
·Experience is Analog behavioural modelling using Real Number Modelling, VerilogA is added advantage
·FPGA emulation experience is added advantage
·Excellent communication and teamwork skills
·B.E/M.E. in Electronics or Computer Science
 
Responsibilities: 
You will be responsible for understanding the Analog-digital partition at system level, develop testplan for functional and circuit performance verification, develop the scalable testbench using the SVTB-UVM, test case development, debugging, coverage  model development, coverage closure. You will be working with Analog circuit design team, digital design team, Analog modelling, characterization team, SoC integration team to complete the successful core level verification, integration into SoC, post-silicon validation.
Keywords:  system Verilog, Low Power, UVM, AMS, Ethernet, USB2.0, USB3.0, SGMII, PCIe, UFS, DDR
 

Thanks & Regards,
Ashok Kumar
Atika Technologies
5 Independence Way, Suite 300
Princeton, NJ 08540 Direct: 609-454-0103
ashok@atikatech.com
http://www.atikatech.com

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